perilus

RISC-V processor built with Chisel
git clone https://git.bradleygannon.com/perilus.git
Log | Files | Refs | Submodules | README

DateCommit messageAuthorFiles+-
2026-10-05 03:10Fix a bug related to handling I-type immediatesBradley Gannon5+11-23
2026-10-04 16:48Fix a bug where the data mask was being applied incorrectlyBradley Gannon1+3-1
2026-10-04 16:32Replace gtkwave with surferBradley Gannon1+1-1
2026-10-04 16:31Add VCD recording to simulatorBradley Gannon6+113-3
2026-10-03 01:57Mask LSB when writing PCBradley Gannon1+2-1
2026-10-02 03:26Fix a bug where certain jalr instructions did bad arithmeticBradley Gannon1+3-1
2026-10-02 03:04Replace TUI simulator with desktop versionBradley Gannon23+5105-1740
2026-07-22 22:48Improve justfileBradley Gannon2+42-24
2026-07-22 22:04Add test runner script for ACT suiteBradley Gannon1+26-0
2026-07-22 22:03Add test subcommand and load_file method to simulatorBradley Gannon4+206-9
2026-07-22 22:02Increase default memory size from 1 KiB to 1 MiBBradley Gannon1+1-1
2026-07-22 21:54Tweak processor model config and simplify pass/fail macrosBradley Gannon2+37-56
2026-07-22 21:27Add clippy to flake.nixBradley Gannon1+1-0
2026-07-22 21:27Remove asm.shBradley Gannon1+0-12
2026-07-18 23:52Explicitly set gcc/g++ for compiling Verilator source in simulatorBradley Gannon1+6-1
2026-07-18 02:28Add initial configuration for building riscv-arch-testBradley Gannon9+954-3
2026-07-13 01:37Add riscv-arch-test submoduleBradley Gannon2+4-0
2026-07-13 00:42Replace shell.nix with flake.nixBradley Gannon3+59-19
2026-05-02 02:44Use saturating arithmetic in key placesBradley Gannon1+10-6
2026-05-01 02:46Add scrollable memory and jump-to-selectionBradley Gannon1+29-3
2026-05-01 02:45Add missing Verilator flagBradley Gannon1+1-1
2026-04-26 22:14Update READMEBradley Gannon1+13-10
2026-04-26 21:59Add standalone simulatorBradley Gannon8+2539-0
2026-04-26 21:30Fix several problems with the memory moduleBradley Gannon7+408-107
2026-04-03 01:25Add system diagramBradley Gannon5+162-3
2026-04-03 00:26Add support for lui and auipcBradley Gannon5+81-7
2026-04-03 00:24Only write data to registers or memory when reset is not assertedBradley Gannon2+2-2
2026-03-31 21:06Add support for all remaining B-type instructions in RV32IBradley Gannon5+160-44
2026-03-31 02:01Add support for jalrBradley Gannon2+36-5
2026-02-27 22:17Add support for all load and store instructions in RV32IBradley Gannon5+175-72
2026-02-27 03:02Add support for slli, sltiu, xori, srli, and sraiBradley Gannon6+199-130
2026-02-25 02:11Add NOP impls for environment instructionsBradley Gannon3+50-4
2026-02-25 00:32Add support for xor, sll, srl, sra, and sltuBradley Gannon6+281-175
2026-02-24 00:44Add test for jalBradley Gannon1+24-1
2026-01-31 19:44Add Fibonacci test programBradley Gannon1+38-0
2026-01-31 16:26Add tests for addi, ori, andi, and slti instructionsBradley Gannon1+83-4
2026-01-31 15:24Fix width parameter in asm.shBradley Gannon1+1-1
2026-01-30 22:34Add support for add, sub, slt, or, and and instructionsBradley Gannon1+344-127
2026-01-30 22:29Add asm.sh to quickly assemble files verbatimBradley Gannon3+16-0
2026-01-29 02:21Fix register file testsBradley Gannon1+4-2
2026-01-29 02:03Create zip archive containing all Verilog outputBradley Gannon1+5-8
2026-01-29 01:59Remove lingering assetsBradley Gannon2+0-40
2026-01-28 21:06Dynamically write memory files for tests instead of keeping them in assets/Bradley Gannon13+88-317
2026-01-28 02:20Move generated Verilog files into their own directoryBradley Gannon1+1-0
2026-01-28 02:05Run formatterBradley Gannon1+85-85
2026-01-28 02:04Fix and uncomment existing instruction testsBradley Gannon4+92-88
2026-01-28 02:03Remove printf debug statementsBradley Gannon3+0-8
2026-01-28 02:01Make memory addresses byte-oriented with rounding to word boundariesBradley Gannon2+7-11
2026-01-28 01:58Add gtkwave to shell.nixBradley Gannon1+1-0
2026-01-27 20:51Merge branch 'main' into bmgxyz/beq-fixBradley Gannon2+3-3
2026-01-02 21:08beq test not working. need to check imm extendermbbutler6+211-57
2026-01-02 19:25Add 'sw' test and 'just' project mgmtmbbutler7+154-1
2026-01-01 19:29Fix assets paths in PerilusTests that were pointing to my local filesystemBradley Gannon1+2-2
2026-01-01 19:06Add memory/reg init from file, add optional debug interfaces, and execute first instructionBradley Gannon13+336-74
2025-12-31 02:34Factor out AluDecoder and InstructionDecoder and add tests for bothBradley Gannon2+87-6
2025-12-31 01:47Add ControlUnitFsmTestsBradley Gannon2+143-1
2025-12-30 03:12Add control unit FSM, add several enums, add J-type sign extension, bump nixpkgsBradley Gannon7+327-114
2025-12-02 00:16Connect data path and control unit IOBradley Gannon2+72-18
2025-12-01 02:38Update READMEBradley Gannon1+26-1
2025-11-30 18:32Implement RegisterFileBradley Gannon3+75-8
2025-11-30 02:27Add better CI, updated .gitignore, add scalafmt as sbt pluginBradley Gannon6+89-41
2025-11-30 00:58Fix names in Alu testsBradley Gannon1+68-68
2025-11-30 00:57Implement MemoryBradley Gannon3+62-7
2025-11-29 23:29Implement AluBradley Gannon3+142-2
2025-11-29 20:21Implement ExtendUnitBradley Gannon4+83-3
2025-11-29 16:17Configure and run scalafmtBradley Gannon3+4-4
2025-11-29 03:59Add packages for major block diagram elements and reorg top levelBradley Gannon7+157-46
2025-10-31 01:06Copy parts of chisel-template and add control unit stubBradley Gannon6+126-0
2025-10-09 21:17init README.mdmbbutler1+1-0