perilus

commit 4fd03d784ca2dd1c5dfb1bb8c8a9bf0c9c3f193b
parent 04c8427eaf8d42b9291a0a0c929200f079651f8b
Author: Bradley Gannon <bradley@bradleygannon.com>
Date:   Sun,  4 Oct 2026 23:10:28 -0400

Fix a bug related to handling I-type immediates

Diffstat:
M
src/main/scala/controlUnit.scala
 | 
14
+++-----------
M
src/main/scala/extendUnit.scala
 | 
7
++-----
M
src/test/scala/perilus/controlUnit.scala
 | 
6
++----
M
src/test/scala/perilus/extendUnit.scala
 | 
3
+--
M
src/test/scala/perilus/main.scala
 | 
4
+++-

5 files changed, 11 insertions(+), 23 deletions(-)
diff --git a/src/main/scala/controlUnit.scala b/src/main/scala/controlUnit.scala
@@ -281,15 +281,11 @@ class InstructionDecoder extends Module {
     val immSrc = Output(ImmSrc())
   })
 
-  io.immSrc := ImmSrc.iTypeSigned
+  io.immSrc := ImmSrc.iType
 
   switch(io.op) {
     is(Opcode.load) {
-      when(io.funct3 === 4.U || io.funct3 === 5.U) {
-        io.immSrc := ImmSrc.iTypeUnsigned
-      }.otherwise {
-        io.immSrc := ImmSrc.iTypeSigned
-      }
+      io.immSrc := ImmSrc.iType
     }
     is(Opcode.store) {
       io.immSrc := ImmSrc.sType
@@ -298,11 +294,7 @@ class InstructionDecoder extends Module {
       io.immSrc := ImmSrc.bType
     }
     is(Opcode.immediate) {
-      when(io.funct3 === 3.U) {
-        io.immSrc := ImmSrc.iTypeUnsigned
-      }.otherwise {
-        io.immSrc := ImmSrc.iTypeSigned
-      }
+      io.immSrc := ImmSrc.iType
     }
     is(Opcode.jal) {
       io.immSrc := ImmSrc.jType
diff --git a/src/main/scala/extendUnit.scala b/src/main/scala/extendUnit.scala
@@ -14,12 +14,9 @@ class ExtendUnit extends Module {
 
   // Table 7.5 (page 412)
   switch(io.immSrc) {
-    is(ImmSrc.iTypeSigned) {
+    is(ImmSrc.iType) {
       io.immExt := Cat(Fill(20, io.input(24)), io.input(24, 13))
     }
-    is(ImmSrc.iTypeUnsigned) {
-      io.immExt := Cat(Fill(20, 0.U), io.input(24, 13))
-    }
     is(ImmSrc.sType) {
       io.immExt := Cat(Fill(20, io.input(24)), io.input(24, 18), io.input(4, 0))
     }
@@ -48,5 +45,5 @@ class ExtendUnit extends Module {
 }
 
 object ImmSrc extends ChiselEnum {
-  val iTypeSigned, iTypeUnsigned, sType, bType, jType, uType = Value
+  val iType, sType, bType, jType, uType = Value
 }
diff --git a/src/test/scala/perilus/controlUnit.scala b/src/test/scala/perilus/controlUnit.scala
@@ -112,15 +112,13 @@ class ControlUnitTests extends AnyFunSpec with ChiselSim {
       simulate(new InstructionDecoder) { instrDecoder =>
         {
           instrDecoder.io.op.poke(Opcode.load)
-          // TODO include iTypeUnsigned as well
-          instrDecoder.io.immSrc.expect(ImmSrc.iTypeSigned)
+          instrDecoder.io.immSrc.expect(ImmSrc.iType)
           instrDecoder.io.op.poke(Opcode.store)
           instrDecoder.io.immSrc.expect(ImmSrc.sType)
           instrDecoder.io.op.poke(Opcode.branch)
           instrDecoder.io.immSrc.expect(ImmSrc.bType)
           instrDecoder.io.op.poke(Opcode.immediate)
-          // TODO include iTypeUnsigned as well
-          instrDecoder.io.immSrc.expect(ImmSrc.iTypeSigned)
+          instrDecoder.io.immSrc.expect(ImmSrc.iType)
           instrDecoder.io.op.poke(Opcode.jal)
           instrDecoder.io.immSrc.expect(ImmSrc.jType)
         }
diff --git a/src/test/scala/perilus/extendUnit.scala b/src/test/scala/perilus/extendUnit.scala
@@ -11,8 +11,7 @@ class ExtendUnitTests extends AnyFunSpec with ChiselSim {
     it("correctly extends I-type immediates") {
       simulate(new ExtendUnit) { extendUnit =>
         {
-          // TODO include iTypeUnsigned as well
-          extendUnit.io.immSrc.poke(ImmSrc.iTypeSigned)
+          extendUnit.io.immSrc.poke(ImmSrc.iType)
 
           extendUnit.io.input.poke("hdc4691".U) // immediate value is 0xe9b
           extendUnit.io.immExt.expect("h6e2".U)
diff --git a/src/test/scala/perilus/main.scala b/src/test/scala/perilus/main.scala
@@ -335,7 +335,9 @@ class PerilusTests extends AnyFunSpec with ChiselSim {
           rs1 = 24,
           rs1Value = 0x9efde28d,
           imm = 0xdf6,
-          operation = (rs1, imm) => if (toULong(rs1) < toULong(imm)) 1 else 0
+          operation = (rs1, imm) => {
+            if (toULong(rs1) < toULong((imm << 20) >> 20)) 1 else 0
+          }
         )
       }
       it("xori") {